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FPGA

A collection of 3 issues

FPGA Log #01: Include header files for simulation

After finish writing my SystemVerilog code and being able to compile them successfully in Quartus Prime, I decided to launch the simulation to verify whether my design was sound. However, during the simulation compilation phase, I encounter the following issue: # vlog -reportprogress 300 -sv -work work "+incdir+/home/user/

FPGA Log #00: Setting up the environment

I currently have a Altera Cyclone IV FPGA development board and since it is winter break, I decided to code some SystemVerilog modules on it to refresh my RTL design skill. Install Quartus Prime Lite First we need to install the Quartus Prime Lite, which is a free to use

Installing USB-Blaster Driver for Quartus on Ubuntu 16.04

For Ubuntu 16.04, to setup USB Blaster driver, create a file /etc/udev/rules.d/ and insert the following lines: # USB Blaster SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6001", MODE="0666", NAME="bus/